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Browsing by Author Jiang, Xiaobo
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Showing results 1 to 20 of 31
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Issue Date
Title
Author(s)
2018
A Comprehensive Extraction Method to Decompose Different Random Variation Impacts in bulk FinFET Technology
Zhang, Zhe
;
Wang, Runsheng
;
Jiang, Xiaobo
;
Wang, Xingsheng
;
Wang, Yangyuan
;
Huang, Ru
2017
Design Guidelines of Stochastic Computing Based on FinFET: A Technology-Circuit Perspective
Zhang, Yawen
;
Wang, Runsheng
;
Jiang, Xiaobo
;
Lin, Zhenghan
;
Guo, Shaofeng
;
Zhang, Zhe
;
Zhang, Zherui
;
Huang, Ru
2018
Design guidelines of stochastic computing based on FinFET: A technology-circuit perspective
Zhang, Yawen
;
Wang, Runsheng
;
Jiang, Xiaobo
;
Lin, Zhenghan
;
Guo, Shaofeng
;
Zhang, Zhe
;
Zhang, Zherui
;
Huang, Ru
2016
A Device-Level Characterization Approach to Quantify the Impacts of Different Random Variation Sources in FinFET Technology
Jiang, Xiaobo
;
Guo, Shaofeng
;
Wang, Runsheng
;
Wang, Xingsheng
;
Cheng, Binjie
;
Asenov, Asen
;
Huang, Ru
2014
Experimental study on the oxide trap coupling effect in metal oxide semiconductor field effect transistors with HfO2 gate dielectrics
Ren, Pengpeng
;
Wang, Runsheng
;
Jiang, Xiaobo
;
Qiu, Yingxin
;
Liu, Changze
;
Huang, Ru
2018
Extraction of Process Variation Parameters in FinFET Technology Based on Compact Modeling and Characterization
Zhang, Zhe
;
Jiang, Xiaobo
;
Wang, Runsheng
;
Guo, Shaofeng
;
Wang, Yangyuan
;
Huang, Ru
2017
How Close to the CMOS Voltage Scaling Limit for FinFET Technology? - Near-Threshold Computing and Stochastic Computing
Wang, Runsheng
;
Jiang, Xiaobo
;
Guo, Shaofeng
;
Huang, Ru
2018
How close to the CMOS voltage scaling limit for FinFET technology? - Near-threshold computing and stochastic computing
Wang, Runsheng
;
Jiang, Xiaobo
;
Guo, Shaofeng
;
Huang, Ru
2016
IMPACTS OF RANDOM TELEGRAPH NOISE (RTN) ON THE ENERGY DELAY TRADEOFFS OF LOGIC CIRCUITS
Zhang, Yang
;
Jiang, Xiaobo
;
Wang, Junyao
;
Guo, Shaofeng
;
Fang, Yichen
;
Wang, Runsheng
;
Luo, Mulong
;
Huang, Ru
2016
Impacts of random telegraph noise (RTN) on the Energy-Delay tradeoffs of logic circuits
Zhang, Yang
;
Jiang, Xiaobo
;
Wang, Junyao
;
Guo, Shaofeng
;
Fang, Yichen
;
Wang, Runsheng
;
Luo, Mulong
;
Huang, Ru
1-Jul-2021
Improving the short-term frequency stability of a magnetic-state-selected cesium beam clock with optical detection
Liu, Chang
;
Chen, Sifei
;
Chen, Ziyu
;
Li, Lingxiang
;
Xu, Shaohang
;
Li, Yining
;
Wang, Jiale
;
Wang, Yanhui
;
Hou, Shimin
;
Zhang, Jun
;
Dong, Richang
;
Jiang, Xiaobo
2018
Investigation on NBTI-induced dynamic variability in nanoscale CMOS devices: Modeling, experimental evidence, and impact on circuits
Guo, Shaofeng
;
Wang, Runsheng
;
Ren, Pengpeng
;
Liu, Changze
;
Luo, Mulong
;
Jiang, Xiaobo
;
Wang, Yangyuan
;
Huang, Ru
2016
Investigation on the Amplitude Distribution of Random Telegraph Noise (RTN) in Nanoscale MOS Devices
Zhang, Zexuan
;
Guo, Shaofeng
;
Jiang, Xiaobo
;
Wang, Runsheng
;
Huang, Ru
;
Zou, Jibin
2017
Investigation on the V-dd Scaling Limit of Stochastic Computing Circuits based on FinFET Technology
Jiang, Xiaobo
;
Wang, Runsheng
;
Guo, Shaofeng
;
Huang, Ru
2013
Investigations on Line-Edge Roughness (LER) and Line-Width Roughness (LWR) in Nanoscale CMOS Technology: Part I-Modeling and Simulation Method
Jiang, Xiaobo
;
Wang, Runsheng
;
Yu, Tao
;
Chen, Jiang
;
Huang, Ru
2013
Investigations on Line-Edge Roughness (LER) and Line-Width Roughness (LWR) in Nanoscale CMOS Technology: Part II-Experimental Results and Impacts on Device Variability
Wang, Runsheng
;
Jiang, Xiaobo
;
Yu, Tao
;
Fan, Jiewen
;
Chen, Jiang
;
Pan, David Z.
;
Huang, Ru
2012
Investigations on the Correlation between Line-edge-roughness (LER) and Line-width-roughness (LWR) in Nanoscale CMOS Technology
Jiang, Xiaobo
;
Li, Meng
;
Wang, Runsheng
;
Chen, Jiang
;
Huang, Ru
2016
New Approach for Understanding "Random Device Physics" from Channel Percolation Perspectives: Statistical Simulations, Key Factors and Experimental Results
Zhang, Zhe
;
Zhang, Zexuan
;
Wang, Runsheng
;
Jiang, Xiaobo
;
Guo, Shaofeng
;
Wang, Yangyuan
;
Wang, Xingsheng
;
Cheng, Binjie
;
Asenov, Asen
;
Huang, Ru
2015
New Assessment Methodology Based on Energy-Delay-Yield Cooptimization for Nanoscale CMOS Technology
Jiang, Xiaobo
;
Wang, Junyao
;
Wang, Xingsheng
;
Wang, Runsheng
;
Cheng, Binjie
;
Asenov, Asen
;
Wei, Lan
;
Huang, Ru
2017
New Insights into the Amplitude of Random Telegraph Noise in Nanoscale MOS Devices
Zhang, Zexuan
;
Guo, Shaofeng
;
Jiang, Xiaobo
;
Wang, Runsheng
;
Zhang, Zhe
;
Hao, Peng
;
Wang, Yangyuan
;
Huang, Ru
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