Browsing by Author Jiang, Lele
Showing results 1 to 9 of 9
Issue Date |
Title |
Author(s) |
2011 |
Analysis and Optimization of Thermal-Driven Global Interconnects in Nanometer Design |
Jiang, Lele;Cheng, Yuhua;Mao, Junfa |
2013 |
Characteristics of n-MOSFETs with Stress Effects from Neighborhood Devices |
Tai, Wei;Jiang, Lele;Lei, Wang;Wen, Song;Chang, Lifu;Cheng, Yuhua |
2011 |
Characterization and analysis of pattern dependent variation-aware interconnects for a 65nm technology |
Jiang, Lele;Qin, Xiaojing;Chang, Lifu;Cheng, Yuhua |
2013 |
Device Parameter Variations of n-MOSFETS with Dog-bone Layouts in 65nm and 40nm Technologies |
Jiang, Lele;Wen, Song;Tai, Wei;Lei, Wang;Chang, Lifu;Cheng, Yuhua |
2016 |
Impact of STI stress on 40-nm dogbone layout N-MOSFETs |
Wang, Liu;Li, Liubin;Wang, Lei;Jiang, Lele;Wei, Tai;Cheng, Yuhua |
2016 |
IMPACT OF STI STRESS ON 40-NM DOGBONE LAYOUT N-MOSFETS |
Wang, Liu;Li, Liubin;Wang, Lei;Jiang, Lele;Wei, Tai;Cheng, Yuhua |
2010 |
Modeling of Variability in Geometric Parameters of MOSFETs for DFM Applications |
Liu, Danqing;Jiang, Lele;Qin, Xiaojing;Cheng, Yuhua |
2021 |
A Study of the Electrical and Mechanical Reliability Properties of Suspended Graphene NEMS Devices for ESD Protection Applications |
Shen, Li;Lv, Yaoming;Jiang, Lele;Kong, Zhenghui;Lu, Yu;Chen, Qi;Wang, Albert;Cheng, Yuhua |
2010 |
Wafer-Area-Saving Test Structures and Measurement Method for The Characterization of Interconnect Resistance and Capacitance in Nanometer Technologies |
Qin, Xiaojing;Jiang, Lele;Cheng, Yuhua |