| Title | A Comparison Study of DTSCR by TCAD and VFTLP for CDM ESD Protection |
| Authors | Wang, Chenkun Zhang, Feilong Lu, Fei Chen, Qi Li, Cheng Zhao, Meng Gu, Huihui Feng, Guangtao Wu, Hongying Tang, Tianshen Cheng, Yuhua Wang, Albert |
| Affiliation | Univ Calif Riverside, Dept Elect & Comp Engn, Riverside, CA 92521 USA. Semicond Mfg Int Corp, Shanghai, Peoples R China. Peking Univ, Shanghai Res Inst Microelect, Shanghai, Peoples R China. Peking Univ, Sch Elect Engn & Comp Sci, Shanghai, Peoples R China. |
| Keywords | DESIGN |
| Issue Date | 2017 |
| Publisher | 2017 IEEE 24TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL AND FAILURE ANALYSIS OF INTEGRATED CIRCUITS (IPFA) |
| Citation | 2017 IEEE 24TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL AND FAILURE ANALYSIS OF INTEGRATED CIRCUITS (IPFA). 2017. |
| Abstract | This paper reports a study of transient behaviors of diode-triggered silicon-controlled rectifier (DTSCR) electrostatic discharging (ESD) protection structures for ultra-fast Charged Device Model (CDM) ESD protection. The DTSCR ESD protection structures, fabricated in a 28nm CMOS process, were characterized using a new combined Very Fast Transmission Line Pulse (VFTLP) testing and TCAD simulation approach, which resolves the deficiency problem of VFTLP testing due to the effects of ultra-short duration of CDM ESD pulse waveforms. The result reveals critical difference of DTSCR behaviors under VFTLP and real CDM ESD that gives a better evaluation of overshooting, turn-on time, turn-on delay, etc. |
| URI | http://hdl.handle.net/20.500.11897/511897 |
| ISSN | 1946-1550 |
| Indexed | CPCI-S(ISTP) |
| Appears in Collections: | 上海微电子研究院 信息科学技术学院 |
