| Title | Performance Investigation of SRAM Cells Based on Gate-all-around (GAA) Si Nanowire Transistor for Ultra-low Voltage Applications |
| Authors | Ou, Jiaojiao Huang, Ru Liu, Yuchao Wang, Runsheng Wang, Yangyuan |
| Affiliation | Peking Univ, Inst Microelect, Beijing 100871, Peoples R China. |
| Issue Date | 2012 |
| Citation | 2012 IEEE 11TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT-2012).. |
| Abstract | In this paper, the performance metrics (i.e., read and write margins, operation speed, power consumption) of 6T SRAM cell based on gate-all-around (GAA) Si nanowire transistor (SNWT) at 16nm technology node are investigated, as well as the impacts of device variations on GAA SNWT SRAM cells. The results indicate that GAA SNWT SRAM cells have larger read static noise margin, less power-delay product and better tolerance to process variations than planar bulk SRAM cells. And through cell ratio optimization, the GAA SNWT SRAM cells can satisfy the six-sigma (6 sigma) yield at V-DD=0.3V. |
| URI | http://hdl.handle.net/20.500.11897/292708 |
| DOI | 10.1109/ICSICT.2012.6466743 |
| Indexed | EI CPCI-S(ISTP) |
| Appears in Collections: | 信息科学技术学院 |
