Title A low-noise CMOS readout circuit at low frequency for MEMS capacitive accelerometers
Authors Chen, Jianghua
Ni, Xuewen
Mo, Bangxian
Affiliation EDA Institute, School of Information Science and Engineering, Shandong University, Jinan 250100, China
Institute of Microelectronics, Peking University, Beijing 100871, China
Issue Date 2009
Citation 2009 8th IEEE International Conference on ASIC, ASICON 2009.Changsha, China.
Abstract This paper describes a low-noise CMOS readout circuit for MEMS capacitive accelerometers at low frequency. It cancels the input parasitic capacitance and the offset by a combination of switches. The raised current IDS of the input differential pair in the first stage helps reduce sharply the total low-frequency noises without increasing the complexity of the proposed circuit. The switched-capacitor low-pass filter with adjustable bandwidth can eliminate noises and interferences outside its bandwidth, and save chip area at low frequency. The simulation result of the proposed circuit shows that an average 60% noise reduction at low frequency has been achieved when the current in the current source of the first stage is six times larger than the original. The root mean square equivalent input noise voltage is about 6.1nV/rtHz@1kHz. The experimental result shows that the capacitance resolution of the whole CMOS readout circuit is 11aF/rtHz@1kHz. ?2009 IEEE.
URI http://hdl.handle.net/20.500.11897/263104
DOI 10.1109/ASICON.2009.5351441
Indexed EI
Appears in Collections: 信息科学技术学院

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