Browsing by Author Zhang, Zhiru
Showing results 1 to 6 of 6
Issue Date | Title | Author(s) |
2017 | Accelerating binarized convolutional neural networks with software-programmable FPGAs | Zhao, Ritchie; Song, Weinan; Zhang, Wentao; Xing, Tianwei; Lin, Jeng-Hau; Srivastava, Mani; Gupta, Rajesh; Zhang, Zhiru |
2010 | Bit-Level Optimization for High-Level Synthesis and FPGA-Based Acceleration | Zhang, Jiyu; Zhang, Zhiru; Zhou, Sheng; Tan, Mingxing; Liu, Xianhua; Cheng, Xu; Gong, Jason |
2005 | Bitwidth-aware scheduling and binding in high-level synthesis | Cong, Jason; Fan, Yiping; Han, Guoling; Lin, Yizhou; Xu, Junjuan; Zhang, Zhiru; Cheng, Xu |
2021 | Layout Symmetry Annotation for Analog Circuits with Graph Neural Networks | Gao, Xiaohan; Deng, Chenhui; Liu, Mingjie; Zhang, Zhiru; Pan, David Z.; Lin, Yibo |
2017 | A parallel bandit-based approach for autotuning FPGA compilation | Xu, Chang; Liu, Gai; Zhao, Ritchie; Yang, Stephen; Luo, Guojie; Zhang, Zhiru |
2020 | SuSy: A Programming Model for Productive Construction of High-Performance Systolic Arrays on FPGAs | Lai, Yi-Hsiang; Rong, Hongbo; Zheng, Size; Zhang, Weihao; Cui, Xiuping; Jia, Yunshan; Wang, Jie; Sullivan, Brendan; Zhang, Zhiru; Liang, Yun; Zhang, Youhui; Cong, Jason; George, Nithin; Alvarez, Jose; Hughes, Christopher; Dubey, Pradeep |